1. Field of the Invention
The present invention relates to a 5B6B coding rule inverse conversion circuit for digital transmission and, in more detail, to improvement of circuit for detecting the mark rate or ratio of 6B code converted by the 5B6B coding rule conversion method.
2. Description of the Prior Art
In general, a self-timing system for extracting the timing wave from the receiving pulse train itself is widely used in a regenerative repeater to be used in digital transmission. In this timing extraction system, the timing information is sometimes lost on the transmission line, in case the input code series is formed by continuation of zero code such as "000 . . . . ".
Therefore, in the digital transmission, the 5B6B coding rule conversion is executed to suppress continuation of zero code in order to avoid such disappearance of the timing information. Here, the 5B6B coding rule conversion means that a digital signal train is divided into groups, each consisting of five bits, and this 5-bit signal is converted into the 5B6B code signal of six bits in accordance with the 5B6B coding rule conversion pattern shown in FIG. 1.
At the time of reception, the received digital signal train is divided into groups, each consisting of six bits and the original 5-bit signal can be obtained by inverse conversion of the 5B6B coding rule.
FIG. 2 shows a conventional 5B6B coding rule inverse conversion circuit.
As shown in this figure, the conventional 5B6B coding rule inverse conversion circuit detects a mark rate of the 6-bit signal to be converted inversely and thereafter the 5B6B coding rule inverse conversion is executed reponsive to such detection of mark rate or ratio. Here, a mark rate means the rate of "ON" bit, namely a bit of logic value "1" in the six bits. In the figure, it is indicated as fractions such as 1/6, 2/6. Namely, the conventional 5B6B coding rule inverse conversion circuit is formed by two mark rate detecting circuits 111, 112, one code inverse conversion circuit 113 and two select circuts 114, 115. The first mark rate detecting circuiti 111 detects the mark rates not listed in the conversion pattern of FIG. 1, namely the mark rate 0/6, 1/6, 2/6, 4/6, 5/6 or 6/6 (where, those not listed in the conversion pattern of FIG. 1 for the mark rates 2/6, 4/6) and outputs the signal S88 when such mark rate is detected. The second mark rate detecting circuit 112 detects the mark rates listed in the conversion pattern of FIG. 1, that is, the mark rate 2/6, 3/6 or 4/6 and then outputs the signal S.sub.86 when the mark rate is 2/6 or 4/6 and also outputs the signal S.sub.87 when the mark rate is 3/6. The code inverse conversion circuit 113 converts inversely the signal S.sub.81 of the six bits, D1.about.D6 by the 5B6B coding rule inverse conversion method when the signal S.sub.86 is outputted from the second mark rate detecting circuit 112 and then outputs such converted signal as the signal S.sub.82 of the five bits. The first select circuit 114 usually outputs the signal S.sub.82 as the signal S.sub.83 and outputs the signal S.sub.85 (the 5-bit signal from D1 to D5) as the signal S.sub.83 when the signal S.sub.87 is outputted from the second mark rate detecting circuit 112. The second select circuit 115 usually outputs the signal S.sub.83 as the signal S.sub.84 and outputs the 5-bit digital signal "10101" as the signal S.sub.84 when the signal S.sub.88 is outputted from the first mark rate detecting circuit 111.
As explained above, in the conventional 5B6B coding rule inverse conversion circuit, the mark rate of the 6-bit 5B6B code signal is detected. When the mark rate is 2/6, 3/6 or 4/6, the 6B6B coding rule inverse conversion is executed in accordance with the conversion pattern of FIG. 1. When the mark rate is 0/6, 1/6, 2/6, 4/6 or 6/6, the 6-bit 6B6B code signal is converted to the 5-bit signal "10101". Those not listed in the conversion pattern of FIG. 1 correspond to the mark rates 2/6 and 4/6.
However, such conventional 5B6B coding rule inverse conversion circuit provides a disadvantage that the scale of circuit becomes large and many redundant circuits are included because the mark rate is detected for all patterns of 6-bit signal (64 patterns) for detection of each mark rate by first mark rate detecting circuit 111 and the second mark rate detecting circuit 112.